The present invention relates to a laminated structure or multi-layer structure such as a gate electrode formed on a processing target comprising a semiconductor substrate or a glass substrate, and a method of forming the same.
In general, in steps of manufacturing a semiconductor integrated circuit, a desired element or elements are obtained by repeatedly performing film formation, pattern etching, and the like on a semiconductor wafer or a glass plate as a processing target.
For example, when a gate element for an MOSFET is formed on the surface of the wafer, impurities of one conductive type are diffused into positions where a source region 2 and a drain region 4 should be formed, in a wafer W, and a gate oxide film 6 made of, for example, SiO2 is formed on the area between the positions on the surface of the wafer while a source-drain channel is formed below the gate oxide film 6, as shown in FIG. 7A. Further, a gate electrode 8 made of a conductive film is formed on the gate oxide film 6, to form a transistor.
In recent days, the gate electrode 8 does not have a single-layer structure but has a multi-layer structure and has a two-layer structure in most cases, in consideration of conductivity. For example, a gate electrode 8 is formed by sequentially layering a poly-crystal silicon layer 10 doped with phosphorus and a metal silicide layer such as a tungsten silicide layer 11, on a gate oxide film 6.
In accordance with down-sizing and high-integration of a semiconductor integrated circuit in recent days, the processing line width and the gate width are narrowed more and more and the film thickness tends to be thinner and thinner in response to demands for multi-layering. Even though the line width is narrowed, it is demanded that electric characteristics of respective layers and interlayer electric characteristics should maintain conventional performances or attain higher performances. In response to such demands, the gate electrode 8 adopts a two-layer structure consisting of poly-crystal silicon 10 doped with phosphorus and tungsten silicide 11.
A film made of silicon material, e.g., a poly-crystal silicon layer 10 doped with phosphorus tends to easily form a natural oxide film 14 as shown in FIG. 7B on-its own surface when exposed to air, moisture, or the like. If a tungsten silicide layer 11 as a next layer is layered on the silicon layer 10 with such a natural oxide film adhered, tightness of a contact between both of the layers 10, 11 is degraded or sufficient electric conductivity cannot be maintained therebetween, resulting in a problem that the electric characteristics are degraded.
Film formations of the poly-crystal silicon layers 10 are normally carried out by batch processing in which wafers are treated in units each consisting of a number of wafers, e.g., 150 wafers, while film formations of a tungsten silicide layers 11 are carried out by piece-by-piece processing in which film formations are carried out for every wafer. As a result, the time for which one wafer is exposed to air varies between wafers, and the thickness of the natural oxide film varies accordingly. Therefore, wet washing is carried out, for example, with use of HF-based paper immediately before layering the tungsten silicide layer 11, in order to remove the natural oxide film 14 sticking to the poly-crystal silicon layer 10.
However, even when wet washing is carried out immediately before layering the tungsten silicide layer 11, it is very difficult to completely remove the natural oxide film 14 once adhered to the surface of the poly-crystal silicon layer 10, without affecting a subbing layer (i.e., the poly-crystal silicon layer 10) below the natural oxide film 14.
In this respect, there has been a proposal of a method in which a poly-crystal silicon layer 10 doped with phosphorus is formed on a semiconductor wafer in a chamber with use of a cluster tool formed, for example, by concentrating a plurality of chambers with air-tightness maintained between each other, and thereafter, the semiconductor wafer is introduced into another chamber in the same cluster tool, to form a tungsten silicide layer 11, without exposing the semiconductor wafer to air, i.e., without allowing any natural oxide film to have an opportunity to stick to the wafer (ref. Japanese Patent Application KOKAI Publication No. 9-17705).
As described above, if the tungsten silicide layer 11 is sequentially formed without exposing the wafer to air after the poly-crystal silicon layer 10 doped with phosphorus is formed, no oxide film is formed on the way of the manufacturing steps, and therefore, the entire gate electrode has a low resistance. It is possible to respond to design rules strictly limited under down-sizing and high integration.
In this case, however, phosphorus doped in the poly-crystal silicon layer 10 unevenly re-diffuses into the upper tungsten silicide layer 11 through an interface between both of these layers, and therefore, phosphorus is unevenly distributed near the surface of the tungsten silicide layer (e.g., between MOSFETs formed in each wafer), resulting in another problem that the electric characteristic is degraded and/or varies. Also, as a result of this, variation appears between wafers and the manufacturing yield is degraded.
If only a slight portion or portions of natural oxide film can remain on the surface of the poly-crystal silicon layer 10 doped with phosphorus after wet washing is carried out to remove the natural oxide film, the slight portion or portions of natural oxide film prevent phosphorus from diffusing into the upper layer, resulting in no problems. However, when sequential film formation is carried out so that no natural oxide film sticks in response to demands for a low resistance required for down-sizing, a new problem of uneven diffusion of phosphorus as described above appears.
In this respect, explanation will be made in more details with reference to a graph shown in FIG. 8.
FIG. 8 is a graph showing a resistance of a gate electrode with respect to a phosphorus density of a poly-crystal silicon layer and dependence of a variation rate of the resistance, where the longitudinal axis represents the resistance and the lateral axis represents the phosphorus density of the poly-crystal layer. In this figure, a broken line A shows a case where a tungsten silicide layer 11 is formed after the poly-crystal silicon layer 10 doped with phosphorus at a phosphorus density represented by the lateral axis is formed and is thereafter exposed to air to apply thereto a natural oxide film. A continuous line B shows a case where a tungsten silicide layer 11 is formed without exposing a poly-crystal silicon layer 10 to air after the poly-crystal silicon layer 10 is formed. In the figure, black circles show average values of resistance at phosphorus densities, respectively, and lines extending vertically from the black circles as the centers indicate a variation rate (width). As is apparent from the graph, in the case of the broken line A, the resistance is slightly high while variation of the resistance is small and uniform. Hence, it is found that diffusion of phosphorus into the tungsten silicide layer is blocked by a natural oxide film. In contrast, in the case of the continuous line B, the resistance decreases as the phosphorus density increases while the variation rate of the resistance increases much more. Hence, it is found that phosphorus unevenly diffuses into the tungsten silicide layer and this case is not preferable for characteristics.
FIGS. 9A and 9B are graphs for recognizing action of phosphorus where the left longitudinal axis represents the resistance of the tungsten silicide layer, the right longitudinal axis represents the uniformity of the resistance, and the lateral axis represents a wafer number. FIG. 9A is a graph showing the sheet resistance of the tungsten silicide layer of a gate electrode with respect to 25 pieces of wafers and the uniformity thereof where a tungsten silicide layer (Wsix) 11 is formed without forming a natural oxide film on a poly-crystal silicon layer 10 doped with phosphorus. FIG. 9B is a graph showing the resistance of the tungsten silicide layer of a gate electrode with respect to 25 pieces of wafers and the uniformity thereof where the tungsten silicide layer 11 is formed without forming a natural oxide film on a poly-crystal silicon layer 10 not doped with phosphorus. In these figures, a continuous line including white circles shows the sheet resistance of the tungsten silicide layer while a continuous line including black circles shows the uniformity of the sheet resistance. Arrows are used as indications thereof. As is apparent from the graphs, in the case of doping no phosphorus into the poly-crystal layer as shown in FIG. 9B, the value of the sheet resistance is naturally constant and the uniformity of the resistance is stable. In contrast, in the case of doping phosphorus into the poly-crystal silicon layer as shown in FIG. 9A, the resistance of the tungsten silicide layer greatly changes and the uniformity of the resistance is accordingly unstable and degraded greatly. Thus, direct formation of a tungsten silicide layer 11 on a poly-crystal silicon layer 10 doped with phosphorus causes uneven diffusion of phosphorus which leads to characteristic variation and is not preferable.
The present invention has an object of providing a multi-layer structure and a method of forming the same, capable of preventing uneven diffusion of impurities into a tungsten silicide layer as an upper layer from a poly-crystal silicon layer as a lower layer.
As to a first aspect of the present invention, there is provided a method of forming a multi-layer structure, comprising: a step of supplying a processing gas for poly-crystal film formation and first impurities of one conductive type into a film formation device, to form a poly-crystal silicon layer doped with first impurities of one conductive type, on a surface of a processing target; a step of maintaining the processing target in the film formation device to prevent formation of an oxide film on the poly-crystal silicon layer; and a step of supplying a processing gas for tungsten silicide film formation and second impurities of one same conductive type as the first impurities into the film formation device, to form a tungsten silicide layer doped with impurities of the same conductive type as the first impurities, on the poly-crystal silicon layer on which no oxide film is formed. Also, there is provided a multi-layer structure formed by the method.
According to the first aspect, it is possible to obtain a multi-layer structure made of a poly-crystal silicon layer doped with impurities of a conductive type and a tungsten silicide layer (sequentially) formed on and in direct contact with the poly-crystal silicon layer and doped with impurities of the same conductive type as the above-mentioned impurities. In this case, first, the tungsten silicide layer as an upper layer is doped with impurities without uniformity, and therefore, uneven diffusion of impurities from the poly-crystal silicon layer as a lower layer can be negligibly small in comparison with the density of the impurities in the tungsten silicide layer. As a result of this, impurities are kept uniformly diffused in the tungsten silicide layer. Therefore, characteristic variations are reduced and equalized. Second, impurities of one conductive type previously doped in the upper layer or tungsten silicide layer make the upper layer to have a crystal structure, for example, amorphous structure, which may prevent or minimize rediffusion of impurities from the lower layer or poly-crystal silicon layer, so that same effects as those above mentioned are obtained.
According to a second aspect of the present invention, a second poly-crystal silicon layer containing no impurities is inserted (or sequentially formed) as a block layer between a first poly-crystal silicon layer doped with impurities and a tungsten silicide layer containing no impurities, such that the second poly-crystal silicon layer is in direct contact with both the first poly-crystal silicon layer and the tungsten silicide layer. Therefore, uneven diffusion of impurities from the first poly-crystal silicon layer as a lower layer is blocked by the second poly-crystal silicon layer, so that impurities can be prevented from unevenly diffusing into the tungsten silicide layer as an upper layer.
According to a third aspect of the present invention, a second poly-crystal silicon layer having a low impurity density is inserted between a first poly-crystal silicon layer doped with impurities and a tungsten silicide layer containing no impurities. Therefore, uneven diffusion of impurities from the first poly-crystal silicon layer as a lower layer is blocked by the second poly-crystal silicon layer, so that impurities can be prevented from unevenly diffusing into the tungsten silicide layer as an upper layer.
In the first and second aspects, the second poly-crystal silicon layer which serves as a block layer as described above should preferably be formed to be very thin in comparison with the other layers and is set within a range of, for example, about 50 xc3x85 to 500 xc3x85.
According to a fourth aspect of the present invention, only the surface portion of a first poly-crystal silicon layer doped with impurities has an impurity density increased excessively, or a second poly-crystal silicon layer having a high impurity density is directly formed on the first poly-crystal silicon layer. Therefore, impurities do not unevenly diffuse when impurities diffuse into the tungsten silicide layer as an upper layer.
A multi-layer structure as described above is applicable to a gate electrode of a MOSFET, for example.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.